Mux Entity¶
API Documentation: [cpp] [python] [.NET] [CCA] [REST]
A MUX is a multiplexer that takes one or more similar inputs (bus, connection, or signal) and allows switching to one or more outputs. An analogy would be the switchboard of a telephone operator. Calls (inputs) come in and by re-connecting the input to an output, the operator (multiplexer) can direct that input to one or more outputs.
One possible output is to not connect the input to anything which essentially disables that input’s connection to anything. Not every MUX has multiple inputs.
Some mux entities can simply be a single input that can be enabled (connected to a single output) or disabled (not connected to anything).
Mux Channel¶
The mux entity primarily selects one active mux port to connect to the common port using the channel option:
stem.mux.setChannel(channel) [cpp] [python] [NET] [LabVIEW]
stem.mux.getChannel(channel) [cpp] [python] [NET] [LabVIEW]
where (channel) is an index 0-3.
Mux Configuration¶
Default configuration of the mux is to switch all enabled USB-C lines to a single mux channel. If desired, the swith can split the USB-C functional groups and route them to selected mux ports. This feature is referred to as “split mode”. Default and split mode can be enabled with:
stem.mux.getConfiguration(config) [cpp] [python] [NET] [LabVIEW]
stem.mux.setConfiguration(config) [cpp] [python] [NET] [LabVIEW]
where (config) is 0 for default, 1 for Split Mode.
Split Mode¶
After enabling split mode the USB-C functional groups can be individually assigned to separate mux channels with:
stem.mux.getSplitMode(splitMode) [cpp] [python] [NET] [LabVIEW]
stem.mux.setSplitMode(splitMode) [cpp] [python] [NET] [LabVIEW]
where (splitMode) is a 32-bit word, defined below. Each bit pair is a 2-bit binary number from 0-3 representing the mux port to which to route the funtional signal group. VBUS and CC use 4-bits to define which mux ports are connected to the common port VBUS/CC lines.
Bit |
Mux Split Mode Bit Map |
|---|---|
0:1 |
SBU1 |
2:3 |
SBU2 |
4 |
CC1 enable CH0 |
5 |
CC1 enable CH1 |
6 |
CC1 enable CH2 |
7 |
CC1 enable CH3 |
8 |
CC2 enable CH0 |
9 |
CC2 enable CH1 |
10 |
CC2 enable CH2 |
11 |
CC2 enable CH3 |
12:13 |
HS Data |
14:15 |
Reserved |
16:17 |
SS Data |
18:19 |
Reserved |
20 |
VBUS enable CH0 |
21 |
VBUS enable CH1 |
22 |
VBUS enable CH2 |
23 |
VBUS enable CH3 |
24:31 |
Reserved |